Introduction
The rapid expansion of the electrIC power industry has created a worldwide need to reinforce existing transmission and distribution networks and to construct new substations. Advances in microprocessor technology and the increasing cost of support staff are key drivers for power companies to design new automated high-voltage substations using high-accuracy integrated automation systems.
Substations can be classified into two categories, according to voltage level: high-voltage includes 500-kV, 330-kV, and some 220-kV substations, while 220-kV terminal substations, 110-kV, and 35‑kV substations are considered medium- or low-voltage. High-voltage (transmission) substations are large outdoor sites. Low-voltage (distribution) substations are indoor systems located in urban areas to handle high load density.
Improved signal processing technologies make it possible to achieve better than 0.1% accuracy in next-generation systems, as compared to present systems’ typical 0.5% accuracy levels—an improvement mainly achieved with the use of high-performance simultaneous-sampling ADCs (analog-to-digital converters); they provide the resolution and performance that will be needed for future systems.
System Architecture
Figure 1 shows waveforms in a typical 3-phase measurement system. Each power phase is represented by a current transformer (CT) and a voltage transformer (PT). The complete system comprises three such pairs. The average power in the system at any instant is calculated by rapidly taking a number of samples of the output of each transformer, performing a discrete Fourier transform (DFT) on the sampled data, and performing the necessary multiplications and summations.
The ADC takes 32 sets of simultaneous samples of three CT and three PT outputs and stores the results in RAM. The system then calculates a DFT on all six outputs, and presents the results in real- and imaginary format, (A + jB). Magnitude and phase information for each transformer can be calculated as follows:
With A + jB and C + jD as the real and imaginary terms for CT1 and PT1, the magnitudes (Mi) and phases (Pi) are:
The power through the PT1/CT1 pair is:
Similar calculations for the power through PT2/CT2 and PT3/CT3 give Ü2 and Ü3. The total average power in the system is calculated by summing the three power terms:
This method uses a DFT and the above calculations to determine the system power at a single frequency. Performing a fast Fourier transform (FFT) instead of a DFT provides data on harmonics and other higher frequency components; this can allow calculation of additional information, such as system losses or the effects of unwanted noise.
System Requirement
A substation may contain hundreds of transformers. The measured voltages and currents are scaled such that the ±5-V or ±10-V full-scale output range of the transformers represents a range much greater than the full-scale power output capability of the power line. Generally, the power line (especially the current measurements) will run at less than 5% of this range, and typical transformer outputs will lie in a ±20-mV range. Larger signals occur rarely; when they do they usually imply a system fault.
Accurate measurement of these small signals requires a high-resolution ADC with excellent signal-to-noise (S/N). The multichannel ADCs that are used must also be capable of simultaneous sampling. Currently available systems have 14-bit capability—the 4-channel AD7865 14-bit quad ADC, for example, accepts true bipolar signals and provides 80-dB SNR. However, there is an increasing need for higher-performance multichannel ADCs, with 16-bit resolution at sampling rates of 10 kSPS. To make accurate 3-phase current- and voltage measurements, the ADC should be capable of sampling six channels simultaneously, and it must have excellent SNR to measure small signals. Where many ADCs are used in one system, low power dissipation is also important.
An example of a device that meets all of these requirements is the AD7656, which includes six low-power 16-bit, 250-kSPS successive-approximation ADCs in a single package. Shown in Figure 2, the AD7656 is fabricated in the industrial CMOS (iCMOS®) process, which combines high-voltage devices with submicron CMOS and complementary bipolar technologies. iCMOS makes possible a wide range of high-performance analog ICs that are capable of high-voltage operation. Unlike analog ICs using conventional CMOS processes, iCMOS components can readily accept bipolar input signals, providing increased performance and dramatically reducing power consumption and package size.
With 86.6-dB SNR, as shown in Figure 3, the AD7656 provides the performance needed to measure small ac outputs from transformers. Its 250-kSPS update rate is helpful in simplifying designs that need fast data acquisition in order to do real-time FFT post-processing. It is capable of directly accepting ±5-V and ±10-V outputs from the transformer without gain- or level shifting—and consumes a maximum of only 150 mW per device. This is an important consideration when a board must house many ADC channels. Because some systems require as many as 128 channels (as many as 22 six-channel ADCs) on one board, power dissipation can be a critical specification.
Beyond the ADC
A complete power-line measurement system is shown in Figure 4. While the ADC is the heart of the system, many other factors must be considered when designing a high-performance system. The voltage reference and input amplifiers are also critical to system performance, and isolation may be required for remote communications.
ADC Reference Consideration
Whether to use the ADC’s built-in reference (for devices that have an internal reference) or an external reference depends on the system requirements. When multiple ADCs are used on a single board, an external reference works best, as a common reference can eliminate part-to-part reference variations, thus taking advantage of ratiometric behavior.
Generally, a low-drift reference is also important for reducing reference sensitivity to temperature. A simple calculation can help in understanding the importance of drift and in deciding whether to go with the internal reference. A 16-bit ADC with 10‑V full-scale input has a resolution of 152 µV. The drift specification of the AD7656’s internal reference is 25 ppm/°C maximum (6 ppm/°C typical). Over a 50°C temperature range, the reference could drift as much as 1250 ppm; or about 12.5 mV. In applications where drift is important, an external low-drift reference, such as the ADR421 (1 ppm/°C), would be a better choice. A 1 ppm/°C reference will drift by only 0.5 mV over a 50°C temperature range.
Amplifier Choice
The key requirements to consider when choosing an amplifier for power-line monitoring applications are low noise and low offset.
The noise generated by the driver amplifier must be kept as low as possible to preserve the SNR and transition noise performance of the ADC. A low-noise amplifier is also useful for measuring small ac signals. The amplifier’s total offset error, including drift, over the full temperature range should be less than the required resolution. The OP1177/OP2177/OP4177 family of amplifiers combines excellent noise performance (8.5 nV/rtHz) with low offset drift. For example, the OP1177 op amp specifies 60-µV maximum offset and 0.7-µV/°C maximum offset drift. Over a 50°C operating range, the maximum offset drift is 35 µV, so the total error due to offset and offset drift will be less than 95 µV, or 0.0625 LSB.
For power-line monitoring applications, power considerations can be important, especially when up to 128 channels may be measured on one board. The OP1177 family typically consumes a supply current of less than 400 µA per amplifier.
The following table compares some recommended amplifiers for power-line monitoring applications.
Part Number | Noise (nV/rtHz) | Offset Voltage, Typical (mV) | Offset Voltage, Maximum (mV) | Supply Current (mA) | Package |
OP4177 | 8.0 | 15 | 75 | 0.4 | TSSOP, SOIC |
ADA4004 | 1.8 | 40 | 125 | 1.7 | LFCSP, SOIC |
OP747 | 15 | 30 | 100 | 0.3 | SOIC |
ADC Power Supply Generation
Both analog and digital power supplies are required for ADCs. Most systems have a 5-V digital supply, but many do not have a 5-V analog supply. Since using the same supply for both analog and digital circuitry could couple unwanted noise into the system, it is generally a practice to be avoided. For designs that have bipolar ±12-V supplies available, a low-cost, low-dropout regulator (LDO), such as the ADP3330, could be used to generate a good quality 3-V or 5-V supply with 1.4% accuracy over variations in temperature, load, and line.
Communications
The many systems in a single substation require communication with a remote main system controller, typically with electrical isolation. Optocoupler solutions, with their LEDs and photodiodes, are now being supplanted by iCoupler® digital isolators, which use chip-scale microtransformers. i Coupler devices have two- to four-times faster data rates than commonly used high-speed optocouplers—and they operate with as little as 1/50 the power—with correspondingly lower heat dissipation, improved reliability, and reduced cost. In addition to these benefits, the integrated solution also reduces board space and simplifies layout. The ADuM1402 4-channel digital isolator handles data rates up to 100 MSPS with isolation up to 2.5 kV.
RS-232 is often used to connect multiple systems, so isolation between each system and the bus is critical. Digital isolators do not support the RS-232 standard, so they cannot be used between the transceiver and the cable; instead they are used between the transceiver and the local system. Combining an ADuM1402 iCoupler digital isolator, an ADM232L RS-232 transceiver, and an isolated power supply eliminates ground loops and provides effective protection against surge damage.
For systems using the RS-485 protocol, the ADM2486 single-chip isolated RS-485 transceiver is available (Figure 5). It can support data rates up to 20 Mbps and has a 2.5-kV isolation rating.
Signal Processing
Power-line monitoring applications require digital signal processing (DSP) to perform complex math calculations. The high-performance, low-cost, low-power ADSP-BF531 Blackfin processor is ideally suited for performing these complex DFT or FFT calculations.
This Blackfin processor—a highly integrated system-on-a-chip—includes a CAN 2.0B controller, a TWI controller, two UART ports, an SPI port, two serial ports (SPORTs), nine general-purpose 32-bit timers (eight with PWM capability), a real-time clock, a watchdog timer, and a parallel peripheral interface (PPI). These peripherals provide the flexibility needed to communicate across multiple parts and interfaces in the system.
Blackfin processors such as the ADSP-BF536 and ADSP-BF537 include an IEEE-compliant 802.3 10/100 Ethernet MAC (Media Access Controller). This is now a standard requirement for many power-line monitoring systems.
Practical Design Considerations
Special consideration should be given to the ADC’s location and surroundings when designing the printed circuit board. Analog and digital circuitry should be separated and confined to certain areas of the board. At least one ground plane should be used. Avoid running digital lines under the ADC because they couple noise onto the die. The analog ground plane should be allowed to run under the AD7656 to avoid noise coupling. Clocks and other high-speed switching signals should be shielded with digital ground to avoid radiating noise to other sections of the board, and they should never run near analog signal paths. Crossover of digital and analog signals should be avoided. Traces on different but close layers of the board should run at right angles to each other to reduce the effects of feedthrough.
The power supply lines to the ADC should use the largest possible traces to provide low impedance paths and reduce the effect of glitches on the power supply lines. Good connections should be made between the AD7656 supply pins and the power tracks on the board; this should involve the use of single- or multiple vias for each supply pin. Good decoupling is also important to lower the supply impedance presented to the AD7656 and to reduce the magnitude of the supply spikes. Paralleled decoupling capacitors, typically 100 nF and 10 µF, should be placed on all of the power supply pins, close to—or ideally right up against—these pins and their corresponding ground pins.
Conclusion
Increasing worldwide power demands are driving an increase in the number of power lines and power-line substations. As more and more automated monitoring- and fault-detection systems are required, the trend will be towards systems with a large number of channels. With multiple ADCs on each board, efficient use of board area and power dissipation become critical as system designers try to reduce cost while increasing performance.
Higher system performance can be achieved by using high-performance ADCs, such as the AD7656. With six channels and 16-bit resolution, its low power dissipation, high SNR, and small package combine to meet the needs of the next generation of power-line-monitoring system designs.